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Nios is a soft configurable RISC processor, designed for field programmable gate arrays (FPGAs), for embedded uses, by Altera Corp. The 16-bit, first version is called Nios, the 32-bit version is called Nios II. Altera suggests the later for all new design work. By being soft-core, FPGA developers can choose from many system configurations, using the best-fit core, and peripherals.
http://instruct1.cit.cornell.edu/courses/ece576/
Course on system-on-chip and embedded control; much Nios information; taught by Bruce Land, staff member in Neurobiology and Behavior and Electrical and Computer Engineering, Cornell University.
http://en.wikipedia.org/wiki/Nios_II
Growing article, with links to many related topics. Wikipedia.
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